Expansion#

Pinout Diagrams#

PocketBeagle 2 P1 & P2 cape headers are designed to be compatible with PocketBeagle classic as much as possible. Below pinout diagrams are design to simplify cape header pin usage and cape design process for PB2. To start using P1 / P2 cape header choose respective pinout diagram tab below.

Cape Header Connectors#

Beagle cape expansion interface on PocketBeagle 2 like other Beagles is comprised of two headers P1 & P2. All signals on the expansion headers are 3.3V unless otherwise indicated. On some of the cape header pins on PocketBeagle 2 multiple SoC pins are shorted and only one of them should be used at a time. Information regarding the double/shorted pins is provided in the Pinout Diagrams above (simplified) and cape header pin tables below (detailed).

Danger

Do not connect 5V logic level signals to these pins or the board will be damaged.

NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH. DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.

Connector P1#

The following tables show the pinout of the P1 expansion header. The SW is responsible for setting the default function of each pin. Refer to the processor documentation for more information on these pins and detailed descriptions of all of the pins listed. In some cases there may not be enough signals to complete a group of signals that may be required to implement a total interface.

The column heading is the pin number on the expansion header.

The GPIO row is the expected gpio identifier number in the Linux kernel.

Each row includes the gpiochipX and pinY in the format of X Y. You can use these values to directly control the GPIO pins with the commands shown below.

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset X Y=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset X Y=0

For Example:

+---------+----------+
| Pin     | P1.03    |
+=========+==========+
| GPIO    | 1 20     |
+---------+----------+

Use the commands below for controlling this pin (P1.03) where X = 1 and Y = 20

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset 1 20=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset 1 20=0

The BALL row is the pin number on the processor.

The REG row is the offset of the control register for the processor pin.

The MODE # rows are the mode setting for each pin. Setting each mode to align with the mode column will give that function on that pin.

Important

DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.

NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.

P1.02-P1.03#

Pin

P1.02

P1.02A

P1.03

GPIO

GPIO1_10

GPIO0_87

GPIO1_51

BALL

E18

AA19

F18

Register

PADCONFIG104

PADCONFIG89

PADCONFIG150

Address

0x000F41A0

0x000F4164

0x000F4258

Page

29

40

45

MODE 0

MCASP0_AXR0

RGMII2_TX_CTL

USB1_DRVVBUS

MODE 1

PR0_ECAP0_IN_APWM_OUT

RMII2_TX_EN

~

MODE 2

AUDIO_EXT_REFCLK0

MCASP2_AXR4

~

MODE 3

~

PR0_PRU1_GPO0

~

MODE 4

~

PR0_PRU1_GPI0

~

MODE 5

PR0_UART0_TXD

~

~

MODE 6

EHRPWM1_B

~

~

MODE 7

GPIO1_10

GPIO0_87

GPIO1_51

MODE 8

EQEP0_I

~

~

P1.04-P1.07#

Pin

P1.05

P1.07

BALL

AB10

~

Signal

USB1_VBUS

VIN.USB

Pin

P1.04

P1.04A

P1.06

P1.06A

GPIO

GPIO1_12

GPIO0_89

GPIO1_13

GPIO0_78

BALL

D20

Y18

E19

AD18

Register

PADCONFIG106

PADCONFIG91

PADCONFIG107

PADCONFIG80

Address

0x000F41A8

0x000F416C

0x000F41AC

0x000F4140

Page

29

42

29

41

MODE 0

MCASP0_AFSX

RGMII2_TD0

MCASP0_AFSR

RGMII1_TD3

MODE 1

SPI2_CS3

RMII2_TXD0

SPI2_CS0

~

MODE 2

AUDIO_EXT_REFCLK1

MCASP2_AXR6

UART1_RXD

PR0_UART0_TXD

MODE 3

~

PR0_PRU1_GPO2

~

~

MODE 4

~

PR0_PRU1_GPI2

~

~

MODE 5

~

~

~

~

MODE 6

~

~

EHRPWM0_A

~

MODE 7

GPIO1_12

GPIO0_89

GPIO1_13

GPIO0_78

MODE 8

EQEP1_B

~

EQEP1_S

~

P1.08 - P1.11#

Pin

P1_09

P1_11

BALL

AD10

AE9

Signal

USB1.D-

USB1.D+

Pin

P1.08

P1.10

P1.10A

GPIO

GPIO1_14

GPIO1_30

GPIO1_7

BALL

A20

A18

B19

Register

PADCONFIG108

PADCONFIG124

PADCONFIG101

Address

0x000F41B0

0x000F41F0

0x000F4194

Page

28

19

30

MODE 0

MCASP0_ACLKR

EXT_REFCLK1

MCASP0_AXR3

MODE 1

SPI2_CLK

SYNC1_OUT

SPI2_D0

MODE 2

UART1_TXD

SPI2_CS3

UART1_CTSn

MODE 3

~

SYSCLKOUT0

UART6_RXD

MODE 4

~

TIMER_IO4

PR0_IEP0_EDIO_DATA_IN_OUT28

MODE 5

~

CLKOUT0

ECAP1_IN_APWM_OUT

MODE 6

EHRPWM0_B

CP_GEMAC_CPTS0_RFT_CLK

PR0_UART0_RXD

MODE 7

GPIO1_14

GPIO1_30

GPIO1_7

MODE 8

EQEP1_I

ECAP0_IN_APWM_OUT

EQEP0_A

P1.12 - P1.13#

Pin

P1.12

P1.12A

P1.13

GPIO

GPIO1_8

GPIO0_77

GPIO0_36

BALL

A19

AE18

N20

Register

PADCONFIG102

PADCONFIG79

PADCONFIG37

Address

0x000F4198

0x000F413C

0x000F4094

Page

29

41

25

MODE 0

MCASP0_AXR2

RGMII1_TD2

GPMC0_BE1n

MODE 1

SPI2_D1

~

~

MODE 2

UART1_RTSn

PR0_UART0_RXD

~

MODE 3

UART6_TXD

~

MCASP2_AXR12

MODE 4

PR0_IEP0_EDIO_DATA_IN_OUT29

~

PR0_PRU0_GPO13

MODE 5

ECAP2_IN_APWM_OUT

~

PR0_PRU0_GPI13

MODE 6

PR0_UART0_TXD

~

TRC_DATA11

MODE 7

GPIO1_8

GPIO0_77

GPIO0_36

MODE 8

EQEP0_B

~

~

P1.14 - P1.21#

Pin

P1_14

P1_15

P1_16

P1_17

P1_18

P1_19

P1_21

Signal

VDD_3V3

GND

GND

AIN.REF-

AIN.REF+

AIN0

AIN1

Pin

P1.19

P1.20

P1.21

GPIO

GPIO1_1

GPIO0_50

GPIO1_6

BALL

AD22

Y24

AE22

Register

PADCONFIG95

PADCONFIG51

PADCONFIG100

Address

0x000F417C

0x000F40CC

0x000F4190

Page

40

49

42

MODE 0

RGMII2_RX_CTL

VOUT0_DATA5

RGMII2_RD3

MODE 1

RMII2_RX_ER

GPMC0_A5

~

MODE 2

MCASP2_AXR3

PR0_PRU1_GPO5

AUDIO_EXT_REFCLK0

MODE 3

PR0_PRU0_GPO0

PR0_PRU1_GPI5

PR0_PRU0_GPO16

MODE 4

PR0_PRU0_GPI0

UART4_TXD

PR0_PRU0_GPI16

MODE 5

~

PR0_PRU0_GPO13

PR0_UART0_TXD

MODE 6

~

PR0_PRU0_GPI13

~

MODE 7

GPIO1_1

GPIO0_50

GPIO1_6

MODE 8

~

~

EQEP2_B

P1.22 - P1.26#

Pin

P1.22

P1.23

P1.24

P1.25

Signal

GND

AIN2

VOUT

AIN3

Pin

P1.23

P1.25

P1.26

P1.26A

GPIO

GPIO1_5

GPIO1_4

GPIO0_44

MCU_GPIO0_13

BALL

AC21

AB20

K24

D6

Register

PADCONFIG99

PADCONFIG98

PADCONFIG45

MCU_PADCONFIG13

Address

0x000F418C

0x000F4188

0x000F40B4

0x04084034

Page

41

41

26

30

MODE 0

RGMII2_RD2

RGMII2_RD1

GPMC0_CSn3

MCU_MCAN0_TX

MODE 1

~

RMII2_RXD1

I2C2_SDA

WKUP_TIMER_IO0

MODE 2

MCASP2_AXR0

MCASP2_AFSR

GPMC0_A20

MCU_SPI0_CS3

MODE 3

PR0_PRU0_GPO4

PR0_PRU0_GPO3

UART4_TXD

~

MODE 4

PR0_PRU0_GPI4

PR0_PRU0_GPI3

MCASP1_AXR5

~

MODE 5

PR0_UART0_RXD

MCASP2_AXR7

~

~

MODE 6

~

~

TRC_DATA18

~

MODE 7

GPIO1_5

GPIO1_4

GPIO0_44

MCU_GPIO0_13

MODE 8

EQEP2_A

~

MCASP1_ACLKR

~

P1.27 - P1.28#

Pin

P1.27

Signal

AIN4

Pin

P1.27

P1.28

P1.28A

GPIO

GPIO1_3

GPIO0_43

MCU_GPIO0_14

BALL

AE23

K22

B3

Register

PADCONFIG97

PADCONFIG44

MCU_PADCONFIG14

Address

0x000F4184

0x000F40B0

0x04084038

Page

41

49

43

MODE 0

RGMII2_RD0

GPMC0_CSn2

MCU_MCAN0_RX

MODE 1

RMII2_RXD0

I2C2_SCL

MCU_TIMER_IO0

MODE 2

MCASP2_AXR2

MCASP1_AXR4

MCU_SPI1_CS3

MODE 3

PR0_PRU0_GPO2

UART4_RXD

~

MODE 4

PR0_PRU0_GPI2

PR0_PRU0_GPO19

~

MODE 5

~

PR0_PRU0_GPI19

~

MODE 6

PR0_UART0_RTSn

TRC_DATA17

~

MODE 7

GPIO1_3

GPIO0_43

MCU_GPIO0_14

MODE 8

~

MCASP1_AFSR

~

P1.29 - P1.31#

Pin

P1.29

P1.30

P1.31

GPIO

GPIO0_62

GPIO1_21

GPIO0_59

BALL

Y20

E14

Y22

Register

PADCONFIG63

PADCONFIG115

PADCONFIG60

Address

0x000F40FC

0x000F41CC

0x000F40F0

Page

46

45

51

MODE 0

VOUT0_DE

UART0_TXD

VOUT0_DATA14

MODE 1

GPMC0_A17

ECAP2_IN_APWM_OUT

GPMC0_A14

MODE 2

PR0_PRU1_GPO17

SPI2_D1

PR0_PRU1_GPO13

MODE 3

PR0_PRU1_GPI17

EHRPWM2_B

PR0_PRU1_GPI13

MODE 4

UART3_CTSn

~

UART4_RTSn

MODE 5

PR0_PRU0_GPO7

~

PR0_PRU0_GPO4

MODE 6

PR0_PRU0_GPI7

~

PR0_PRU0_GPI4

MODE 7

GPIO0_62

GPIO1_21

GPIO0_59

MODE 8

~

~

~

P1.32 - P1.33#

Pin

P1.32

P1.33

P1.33A

GPIO

GPIO1_20

GPIO1_29

GPIO0_56

BALL

D14

A17

AA23

Register

PADCONFIG114

PADCONFIG123

PADCONFIG57

Address

0x000F41C8

0x000F41EC

0x000F40E4

Page

44

27

50

MODE 0

UART0_RXD

I2C1_SDA

VOUT0_DATA11

MODE 1

ECAP1_IN_APWM_OUT

UART1_TXD

GPMC0_A11

MODE 2

SPI2_D0

TIMER_IO1

PR0_PRU1_GPO10

MODE 3

EHRPWM2_A

SPI2_CLK

PR0_PRU1_GPI10

MODE 4

~

EHRPWM0_SYNCO

UART6_CTSn

MODE 5

~

~

PR0_PRU0_GPO1

MODE 6

~

~

PR0_PRU0_GPI1

MODE 7

GPIO1_20

GPIO1_29

GPIO0_56

MODE 8

~

EHRPWM2_B

~

MODE 9

~

MMC2_SDWP

~

P1.34 - P1.36#

Pin

P1.34

P1.35

P1.36

P1.36A

GPIO

GPIO1_2

GPIO0_88

GPIO0_55

GPIO1_28

BALL

AD23

AE21

V20

B17

Register

PADCONFIG96

PADCONFIG90

PADCONFIG56

PADCONFIG122

Address

0x000F4180

0x000F4168

0x000F40E0

0x000F41E8

Page

40

40

50

27

MODE 0

RGMII2_RXC

RGMII2_TXC

VOUT0_DATA10

I2C1_SCL

MODE 1

RMII2_REF_CLK

RMII2_CRS_DV

GPMC0_A10

UART1_RXD

MODE 2

MCASP2_AXR1

MCASP2_AXR5

PR0_PRU1_GPO9

TIMER_IO0

MODE 3

PR0_PRU0_GPO1

PR0_PRU1_GPO1

PR0_PRU1_GPI9

SPI2_CS1

MODE 4

PR0_PRU0_GPI1

PR0_PRU1_GPI1

UART6_RTSn

EHRPWM0_SYNCI

MODE 5

PR0_ECAP0_SYNC_IN

~

PR0_PRU0_GPO0

~

MODE 6

~

~

PR0_PRU0_GPI0

~

MODE 7

GPIO1_2

GPIO0_88

GPIO0_55

GPIO1_28

MODE 8

~

~

~

EHRPWM2_A

MODE 9

~

~

~

MMC2_SDCD

Connector P2#

The following tables show the pinout of the P2 expansion header. The SW is responsible for setting the default function of each pin. Refer to the processor documentation for more information on these pins and detailed descriptions of all of the pins listed. In some cases there may not be enough signals to complete a group of signals that may be required to implement a total interface.

The column heading is the pin number on the expansion header.

The GPIO row is the expected gpio identifier number in the Linux kernel.

Each row includes the gpiochipX and pinY in the format of X Y. You can use these values to directly control the GPIO pins with the commands shown below.

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset X Y=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset X Y=0

For Example:

+---------+----------+
| Pin     | P2.11    |
+=========+==========+
| GPIO    | 1 1      |
+---------+----------+

Use the commands below for controlling this pin (P2.11) where X = 1 and Y = 1

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset 1 20=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset 1 20=0

The BALL row is the pin number on the processor.

The REG row is the offset of the control register for the processor pin.

The MODE # rows are the mode setting for each pin. Setting each mode to align with the mode column will give that function on that pin.

If included, the 2nd BALL row is the pin number on the processor for a second processor pin connected to the same pin on the expansion header. Similarly, all row headings starting with 2nd refer to data for this second processor pin.

Important

DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.

NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.

P2.01 - P2.02#

Pin

P2.01

P2.01A

P2.02

GPIO

GPIO1_11

GPIO0_86

GPIO0_45

BALL

B20

AD24

U22

Register

PADCONFIG105

PADCONFIG88

PADCONFIG46

Address

0x000F41A4

0x000F4160

0x000F40B8

Page

28

32

47

MODE 0

MCASP0_ACLKX

MDIO0_MDC

VOUT0_DATA0

MODE 1

SPI2_CS1

~

GPMC0_A0

MODE 2

ECAP2_IN_APWM_OUT

~

PR0_PRU1_GPO0

MODE 3

~

~

PR0_PRU1_GPI0

MODE 4

~

~

UART2_RXD

MODE 5

~

~

PR0_PRU0_GPO8

MODE 6

~

~

PR0_PRU0_GPI8

MODE 7

GPIO1_11

GPIO0_86

GPIO0_45

MODE 8

EQEP1_A

~

~

P2.03 - P2.04#

Pin

P2.03A

P2.03

P2.04

GPIO

GPIO1_9

GPIO0_85

GPIO0_46

BALL

B18

AB22

V24

Register

PADCONFIG103

PADCONFIG87

PADCONFIG47

Address

0x000F419C

0x000F415C

0x000F40BC

Page

29

32

48

MODE 0

MCASP0_AXR1

MDIO0_MDIO

VOUT0_DATA1

MODE 1

SPI2_CS2

~

GPMC0_A1

MODE 2

ECAP1_IN_APWM_OUT

~

PR0_PRU1_GPO1

MODE 3

~

~

PR0_PRU1_GPI1

MODE 4

~

~

UART2_TXD

MODE 5

PR0_UART0_RXD

~

PR0_PRU0_GPO9

MODE 6

EHRPWM1_A

~

PR0_PRU0_GPI9

MODE 7

GPIO1_9

GPIO0_85

GPIO0_46

MODE 8

EQEP0_S

~

~

P2.05 - P2.06#

Pin

P2.05

P2.05A

P2.06

GPIO

GPIO1_24

MCU_GPIO0_5

GPIO0_47

BALL

C15

B5

W25

Register

PADCONFIG118

MCU_PADCONFIG5

PADCONFIG48

Address

0x000F41D8

0x04084014

0x000F40C0

Page

28

32

48

MODE 0

MCAN0_TX

MCU_UART0_RXD

VOUT0_DATA2

MODE 1

UART5_RXD

~

GPMC0_A2

MODE 2

TIMER_IO2

~

PR0_PRU1_GPO2

MODE 3

SYNC2_OUT

~

PR0_PRU1_GPI2

MODE 4

UART1_DTRn

~

UART3_RXD

MODE 5

EQEP2_I

~

PR0_PRU0_GPO10

MODE 6

PR0_UART0_RXD

~

PR0_PRU0_GPI10

MODE 7

GPIO1_24

MCU_GPIO0_5

GPIO0_47

MODE 8

MCASP2_AXR0

~

~

MODE 9

EHRPWM_TZn_IN3

~

~

P2.07 - P2.08#

Pin

P2.07

P2.07A

P2.08

GPIO

GPIO1_25

MCU_GPIO0_6

GPIO0_48

BALL

E15

A5

W24

Register

PADCONFIG119

MCU_PADCONFIG6

PADCONFIG49

Address

0x000F41DC

0x04084018

0x000F40C4

Page

28

32

48

MODE 0

MCAN0_RX

MCU_UART0_TXD

VOUT0_DATA3

MODE 1

UART5_TXD

~

GPMC0_A3

MODE 2

TIMER_IO3

~

PR0_PRU1_GPO3

MODE 3

SYNC3_OUT

~

PR0_PRU1_GPI3

MODE 4

UART1_RIn

~

UART3_TXD

MODE 5

EQEP2_S

~

PR0_PRU0_GPO11

MODE 6

PR0_UART0_TXD

~

PR0_PRU0_GPI11

MODE 7

GPIO1_25

MCU_GPIO0_6

GPIO0_48

MODE 8

MCASP2_AXR1

~

~

MODE 9

EHRPWM_TZn_IN4

~

~

P2.09 - P2.10#

Pin

P2.09

P2.09A

P2.10

GPIO

GPIO1_22

MCU_GPIO0_16

GPIO0_91

BALL

A15

D4

AD21

Register

PADCONFIG116

MCU_PADCONFIG16

PADCONFIG93

Address

0x000F41D0

0x04084040

0x000F4174

Page

44

30

42

MODE 0

UART0_CTSn

MCU_MCAN1_RX

RGMII2_TD2

MODE 1

SPI0_CS2

MCU_TIMER_IO3

~

MODE 2

I2C3_SCL

MCU_SPI0_CS2

MCASP2_AFSX

MODE 3

UART2_RXD

MCU_SPI1_CS2

PR0_PRU1_GPO4

MODE 4

TIMER_IO6

MCU_SPI1_CLK

PR0_PRU1_GPI4

MODE 5

AUDIO_EXT_REFCLK0

~

PR0_ECAP0_IN_APWM_OUT

MODE 6

PR0_ECAP0_SYNC_OUT

~

~

MODE 7

GPIO1_22

MCU_GPIO0_16

GPIO0_91

MODE 8

MCASP2_AFSX

~

EQEP2_I

MODE 9

MMC2_SDCD

~

~

P2.11 - P2.17#

Pin

P2.12

P2.13

P2.14

P2.15

P2.16

Signal

PWR.BTN

VOUT - VSYS

VBAT

GND

BAT.TEMP - BAT_TS

Pin

P2.11

P2.11A

P2.17

GPIO

GPIO1_23

MCU_GPIO0_15

GPIO0_64

BALL

B15

E5

AC24

Register

PADCONFIG117

MCU_PADCONFIG15

PADCONFIG65

Address

0x000F41D4

0x0408403C

0x000F4104

Page

44

31

47

MODE 0

UART0_RTSn

MCU_MCAN1_TX

VOUT0_PCLK

MODE 1

SPI0_CS3

MCU_TIMER_IO2

GPMC0_A19

MODE 2

I2C3_SDA

~

PR0_PRU1_GPO19

MODE 3

UART2_TXD

MCU_SPI1_CS1

PR0_PRU1_GPI19

MODE 4

TIMER_IO7

MCU_EXT_REFCLK0

UART2_CTSn

MODE 5

AUDIO_EXT_REFCLK1

~

PR0_PRU0_GPO19

MODE 6

PR0_ECAP0_IN_APWM_OUT

~

PR0_PRU0_GPI19

MODE 7

GPIO1_23

MCU_GPIO0_15

GPIO0_64

MODE 8

MCASP2_ACLKX

~

PR0_ECAP0_IN_APWM_OUT

MODE 9

MMC2_SDWP

~

~

P2.18 - P2.22#

Pin

P1.21

Signal

GND

Pin

P2.18

P2.19

P2.20

P2.22

GPIO

GPIO0_53

GPIO1_0

GPIO0_49

GPIO0_63

BALL

V21

AC20

Y25

AC25

Register

PADCONFIG54

PADCONFIG94

PADCONFIG50

PADCONFIG64

Address

0x000F40D8

0x000F4178

0x000F40C8

0x000F4100

Page

49

42

48

47

MODE 0

VOUT0_DATA8

RGMII2_TD3

VOUT0_DATA4

VOUT0_VSYNC

MODE 1

GPMC0_A8

~

GPMC0_A4

GPMC0_A18

MODE 2

PR0_PRU1_GPO16

MCASP2_ACLKX

PR0_PRU1_GPO4

PR0_PRU1_GPO18

MODE 3

PR0_PRU1_GPI16

PR0_PRU1_GPO16

PR0_PRU1_GPI4

PR0_PRU1_GPI18

MODE 4

UART6_RXD

PR0_PRU1_GPI16

UART4_RXD

UART2_RTSn

MODE 5

PR0_PRU0_GPO17

PR0_ECAP0_SYNC_OUT

PR0_PRU0_GPO12

PR0_PRU0_GPO18

MODE 6

PR0_PRU0_GPI17

PR0_UART0_CTSn

PR0_PRU0_GPI12

PR0_PRU0_GPI18

MODE 7

GPIO0_53

GPIO1_0

GPIO0_49

GPIO0_63

MODE 8

~

EQEP2_S

~

~

P2.24 - P2.27#

Pin

P1.26

Signal

RESET# - nRESET

Pin

P2.24

P2.25

P2.27

GPIO

GPIO0_51

GPIO1_19

GPIO1_18

BALL

Y23

B14

B13

Register

PADCONFIG52

PADCONFIG113

PADCONFIG112

Address

0x000F40D0

0x000F41C4

0x000F41C0

Page

49

43

43

MODE 0

VOUT0_DATA6

SPI0_D1

SPI0_D0

MODE 1

GPMC0_A6

CP_GEMAC_CPTS0_HW2TSPUSH

CP_GEMAC_CPTS0_HW1TSPUSH

MODE 2

PR0_PRU1_GPO6

EHRPWM_TZn_IN0

EHRPWM1_B

MODE 3

PR0_PRU1_GPI6

~

~

MODE 4

UART5_RXD

~

~

MODE 5

PR0_PRU0_GPO14

~

~

MODE 6

PR0_PRU0_GPI14

~

~

MODE 7

GPIO0_51

GPIO1_19

GPIO1_18

MODE 8

~

~

~

P2.28 - P2.39#

Pin

P2.28

P2.29

P2.29A

GPIO

GPIO0_61

GPIO1_17

GPIO0_40

BALL

AB24

A14

M22

Register

PADCONFIG62

PADCONFIG111

PADCONFIG41

Address

0x000F40F8

0x000F41BC

0x000F40A4

Page

47

43

20

MODE 0

VOUT0_HSYNC

SPI0_CLK

GPMC0_DIR

MODE 1

GPMC0_A16

CP_GEMAC_CPTS0_TS_SYNC

PR0_ECAP0_IN_APWM_OUT

MODE 2

PR0_PRU1_GPO15

EHRPWM1_A

~

MODE 3

PR0_PRU1_GPI15

~

MCASP2_AXR13

MODE 4

UART3_RTSn

~

PR0_PRU0_GPO16

MODE 5

PR0_PRU0_GPO6

~

PR0_PRU0_GPI16

MODE 6

PR0_PRU0_GPI6

~

TRC_DATA14

MODE 7

GPIO0_61

GPIO1_17

GPIO0_40

MODE 8

~

~

EQEP2_S

P2.30 - P2.31#

Pin

P2.30

P2.31

P2.31A

GPIO

GPIO0_58

GPIO1_15

GPIO0_90

BALL

AA24

A13

AA18

Register

PADCONFIG59

PADCONFIG109

PADCONFIG92

Address

0x000F40EC

0x000F41B4

0x000F4170

Page

51

42

42

MODE 0

VOUT0_DATA13

SPI0_CS0

RGMII2_TD1

MODE 1

GPMC0_A13

~

RMII2_TXD1

MODE 2

PR0_PRU1_GPO12

EHRPWM0_A

MCASP2_ACLKR

MODE 3

PR0_PRU1_GPI12

~

PR0_PRU1_GPO3

MODE 4

UART5_CTSn

~

PR0_PRU1_GPI3

MODE 5

PR0_PRU0_GPO3

~

MCASP2_AXR8

MODE 6

PR0_PRU0_GPI3

PR0_ECAP0_SYNC_IN

~

MODE 7

GPIO0_58

GPIO1_15

GPIO0_90

P2.32 - P2.35#

Pin

P2.32

P2.33

P2.34

GPIO

GPIO0_57

GPIO0_52

GPIO0_60

BALL

AB25

AA25

AA21

Register

PADCONFIG58

PADCONFIG53

PADCONFIG61

Address

0x000F40E8

0x000F40D4

0x000F40F4

Page

50

49

51

MODE 0

VOUT0_DATA12

VOUT0_DATA7

VOUT0_DATA15

MODE 1

GPMC0_A12

GPMC0_A7

GPMC0_A15

MODE 2

PR0_PRU1_GPO11

PR0_PRU1_GPO7

PR0_PRU1_GPO14

MODE 3

PR0_PRU1_GPI11

PR0_PRU1_GPI7

PR0_PRU1_GPI14

MODE 4

UART5_RTSn

UART5_TXD

UART4_CTSn

MODE 5

PR0_PRU0_GPO2

PR0_PRU0_GPO15

PR0_PRU0_GPO5

MODE 6

PR0_PRU0_GPI2

PR0_PRU0_GPI15

PR0_PRU0_GPI5

MODE 7

GPIO0_57

GPIO0_52

GPIO0_60

P2.35 - P2.36#

Pin

P2.35

P2.36

Signal

AIN5

AIN7

Pin

P2.35

P2.36

GPIO

GPIO0_54

GPIO1_16

BALL

W21

C13

Register

PADCONFIG55

PADCONFIG110

Address

0x000F40DC

0x000F41B8

Page

50

43

MODE 0

VOUT0_DATA9

SPI0_CS1

MODE 1

GPMC0_A9

CP_GEMAC_CPTS0_TS_COMP

MODE 2

PR0_PRU1_GPO8

EHRPWM0_B

MODE 3

PR0_PRU1_GPI8

ECAP0_IN_APWM_OUT

MODE 4

UART6_TXD

~

MODE 5

PR0_PRU0_GPO16

~

MODE 6

PR0_PRU0_GPI16

~

MODE 7

GPIO0_54

GPIO1_16

MODE 8

~

~

MODE 9

~

EHRPWM_TZn_IN5